ASIC Design Verification Consulting
Greg White - BSEE
20 years experience in ASIC and FPGA Circuit Design and Design Verification
ASIC and FPGA Design Verification Consulting
BSEE (Bachelor of Science in Electrical and Computer Engineering) from University of Wisconsin, Madison
with emphasis on:
- Communiations Theory
- Analog Circuit Design
US Citizen with over twenty years experience with logic design, verification and synthesis of digital ASICs (Application-Specific ICs) and FPGA programmable logic.
Digital Design and Verification
- Verification of digital IC designs using SystemVerilog with UVM and OVM, C, C++, PERL, TCL and other tools.
- Logic Design and Synthesis