Clients include

ASIC Design Verification Consulting
Greg White - BSEE

20 years experience in ASIC and FPGA Circuit Design and Design Verification
US Citizen


BSEE - Bachelor of Science, Electrical and Computer Engineering University of Wisconsin, Madison


While in engineering school I worked with UW's Space Science and Engineering Center developing picture compression algorithms for satellite weather pictures and building digital circuit boards.

Open Verification Methodology
System Verilog